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Semiconductor History | Intel Headquarters, 17 November 2008 — Nehalem Ended the Front-Side-Bus Era
· 2008-11
Personal memoryBy kevin · · updated · Report an issue
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Semiconductor History | Intel Headquarters, 17 November 2008 — Nehalem Ended the Front-Side-Bus Era
kevin
11/17/2008
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The markings on this processor identify a Core i7-920, the least expensive of Intel's first three Nehalem desktop models at a list price of $284 in thousand-unit quantities.
Intel introduced the Core i7 line on 17 November 2008. The 920, 940, and 965 Extreme Edition combined four cores with Hyper-Threading, an eight-megabyte shared level-three cache, and a 45-nanometre manufacturing process.
The architectural break sat around the cores.
Earlier high-end Intel desktops reached memory through a chipset and a shared front-side bus. Nehalem put a three-channel DDR3 memory controller on the processor and used QuickPath Interconnect for high-speed links, more than doubling memory bandwidth against Intel's preceding Extreme platform in the company's launch measurements.
Turbo Boost added another practical change.
An on-chip power-control unit could raise the clock speed of active cores when temperature, current, and power limits allowed it. Hyper-Threading, absent from the Core 2 generation, returned so that the four physical cores could present eight software threads.
The gains required a new platform.
First-generation Core i7 buyers needed an LGA1366 motherboard with Intel's X58 chipset and DDR3 memory commonly installed in sets of three. The flagship 965 cost $999, and even the cheaper 920 sat inside a high-end system whose board and memory could make an upgrade much more expensive than the processor price suggested.
That segmentation limited the initial audience, but the design direction lasted.
Integrating memory control reduced a bottleneck that had become harder to manage as core counts rose, while QuickPath replaced one shared bus with dedicated links suited to multicore and multiprocessor systems. Later, less expensive Nehalem variants brought parts of the architecture to broader markets with different sockets and channel counts.
Nehalem was therefore both a performance advance and a platform reset. Intel delivered much higher data throughput and finer power control, but customers paid through new boards, new memory arrangements, and sharply tiered products.
The pin marks Intel's Santa Clara headquarters, the dateline of the official Core i7 launch announcement. The public Intel Museum is located on the campus; surrounding offices are private working areas.
Photo: Fritzchens Fritz, CC0 1.0, via Wikimedia Commons.
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